Design and code a simple CPU using the following diagrams
Takeaways
Design a finite state machine to control a processor datapath
Utilize FPGA memory resources
Understand the basics of memory organization and memory interfacing
Disclaimer
Due to the Univeristy of Pittsburgh's academic integrity policy, I am unable to publicly
provide detailed information on
my design process, and final design of this project. If you are in need of any more
clarification you can contact me here.